An n-bit analog-to-digital converter (ADC) divides a certain signal range into 2′ quantizing intervals and encodes each of the quantizing intervals. Generally, the ADC adopts binary coding. That is, according to sizes of signals from small to large, the quantizing intervals are sequentially encoded as 000, 001, 010, . . . , and 111 (taking a 3-bit ADC as an example). FIG. 1 shows a conversion curve of a 3-bit ADC.
In a parallel conversion-type analog-to-digital converter (also called Flash ADC or flashing ADC), taking the 3-bit analog-to-digital converter as an example, as shown in FIG. 1, a signal range is divided into 8 quantizing intervals by seven signal voltages V1, V2, V3, V4, V5, V6 and V7; an input analog signal is compared with the seven signal voltages by seven comparators, and the quantizing interval in which the input analog signal is located is determined according to output of the comparators; and each of the quantizing interval is encoded, generally from small to large, as 000, 001, 010, . . . , and 111. If the comparator is an ideal comparator, the output of the flash ADC is as shown in FIG. 1. In an actual situation, due to offset of the comparators, voltages of the divided intervals deviate from V1, V2, V3, V4, V5, V6 and V7; and an actual conversion curve is as shown in FIG. 2.
An offset voltage is caused by non-uniform distribution of manufacturing process parameters of a semiconductor integrated circuit on a wafer, is distributed within a certain range, and has unpredictable magnitude and plus-minus sign. If there is the offset voltage, the flash ADC has a large INL (Integral nonlinearity) and DNL (Differential Nonlinearity) error. If the offset voltage is especially severe, it may cause a functional problem such as code missing.
At present, a larger comparator is adopted to reduce the impact of the offset voltage on the performance of the flash ADC. However, in this way, an area and cost of a chip are increased. Meanwhile, the larger comparator has a larger parasitic capacitance, which reduces a conversion speed and bandwidth of the converter.